57 Commits

Author SHA1 Message Date
730dcec440 Mandelbrot 2025-12-02 17:52:01 +01:00
d5699f2da3 Mandelbrot 2025-12-02 17:31:46 +01:00
fc2a63d7f1 Working cube 2025-12-02 16:22:15 +01:00
80a78441ef Merges Cargo.toml 2025-12-02 14:19:32 +01:00
54ec7106ed Rust: Color pub u8 2025-12-02 14:17:52 +01:00
d757633816 Fixed mandelbrot 2025-12-02 14:16:55 +01:00
1c0ee18ba6 Add game 2048 2025-11-28 14:13:42 +01:00
6190053330 Add game 2048 2025-11-28 13:04:03 +01:00
da6e1ea7b0 Simple mandelbrot in rust 2025-11-25 17:16:32 +01:00
c0b4311458 Ups frequency to 80Mhz : unstable behaviour 2025-11-16 16:45:00 +01:00
dbe0a488f3 Corrects Clint module, and adds rust clint debugger 2025-11-16 15:24:34 +01:00
4955f9b952 Gets rust running rv64iM 2025-11-16 12:19:49 +01:00
674c399ef6 Adds sample rust program 2025-11-15 02:11:00 +01:00
cfce066cd7 Modifies test slightly because now RAM is relocated to 0x10000 2025-11-15 01:26:49 +01:00
e35f2a4242 Corrects critical mistake where core tried to bypass even if previous instruction did not write-back 2025-11-15 00:57:59 +01:00
0c377a1380 Adds a way to simulate the programs with spike, to compare PCs and debug 2025-11-15 00:57:30 +01:00
e55c3fde14 Reduces LUT needed by mul extension 2025-11-14 19:08:41 +01:00
ca03b29774 Rust character drawing 2025-11-14 09:58:58 +01:00
d8596b2247 Rust character drawing 2025-11-14 09:57:42 +01:00
f5d8c77d06 Improves test for jumps 2025-11-14 08:55:07 +01:00
823f4ed43c Merge branch 'rust' 2025-11-13 10:41:19 +01:00
780da5b6d2 Merge branch 'main' into rv64im 2025-11-13 10:28:22 +01:00
7bc23ce211 Starts adding fontplate for VGA 2025-11-13 10:26:37 +01:00
470445c441 Merge branch 'rv64i' of gitlab.ensimag.fr:thillarj/FMN_2526S1_thillarj_chaboisa into rv64i 2025-11-13 09:49:37 +01:00
030149cbea Rv64i : passing test 2025-11-13 09:49:18 +01:00
c8cd44974f Fixs JALR instruction 2025-11-13 09:01:54 +01:00
3044a54a09 Add registers in rust 2025-11-12 23:51:16 +01:00
8326c1f169 Starts adding rust in the toolchain 2025-11-12 22:05:25 +01:00
7bb8b993ae Implements (mostly untested) rv64i) 2025-11-12 18:02:14 +01:00
02fcf5ee2c Merge branch 'rv64i' into rv64im 2025-11-12 12:22:34 +01:00
992cf37b92 Moves control unit ops to separate files 2025-11-12 11:53:28 +01:00
cfacd6a9fc rv64im: passing tests 2025-11-12 11:50:09 +01:00
7a1221b16e Merge branch 'rv64i' into rv64im 2025-11-11 19:17:46 +01:00
8cff4de02e Adds extension M instructions: not tested 2025-11-11 13:10:19 +01:00
4c967431ed Adds a test for load immediate (li) pseudo instruction
This makes sure the other tests can build upon a sane base
2025-11-11 11:05:05 +01:00
297562766c Adds addiw instruction, all tests passing 2025-11-10 22:07:15 +01:00
9daa296892 Lays groundword for Rv64i extension
Some base files had to be modified to support 64-bit architecture
as well as the Makefile to load 64-bit words into memory
2025-11-10 16:38:40 +01:00
03e315903e Implements sub: passing tests 2025-11-09 18:33:12 +01:00
441f665d34 Stage 12: passing tests 2025-11-09 18:23:24 +01:00
603a1ac54a Stage 11: Passing tests 2025-11-09 17:48:18 +01:00
4018f69f65 Stage 10: passing tests 2025-11-09 15:35:42 +01:00
ec60da2be3 Merges upstream 2025-11-08 18:57:55 +01:00
60d57b69bf Stage 10: test not passing 2025-11-08 18:56:19 +01:00
036f432d76 Stage 9: Full implemntation + passing tests 2025-11-07 18:03:45 +01:00
e83e7c11c1 Stage 8: all tests passing 2025-11-07 15:27:15 +01:00
c88662403e Attempts to implement jalr, test not passing 2025-11-07 13:37:46 +01:00
cbf7ec9ad3 Add jal instruction 2025-11-07 11:51:33 +01:00
c2c16d9672 Stage 7: Register to register operations, all tests passing 2025-11-06 19:02:42 +01:00
37435c6677 Add tests for stage 7 2025-11-06 18:52:31 +01:00
1c829366de Implements stage 6: tests passing 2025-11-06 18:38:32 +01:00