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Stage 12: passing tests

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This commit is contained in:
Julien THILLARD
2025-11-09 18:23:24 +01:00
parent 603a1ac54a
commit 441f665d34
6 changed files with 15 additions and 24 deletions
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2
bench/tests/op/lb.s
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@@ -2,11 +2,9 @@
.text
_start:
addi x1, x0, 0x0FB
nop # Next instruction depends on previous register op
sb x1, 100(x0)
lb x31, 100(x0)
addi x1, x0, 0x0FB
nop # Next instruction depends on previous register op
sb x1, 106(x0)
lb x31, 106(x0)

2
bench/tests/op/lbu.s
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@@ -2,11 +2,9 @@
.text
_start:
addi x1, x0, 0x0FB
nop # Next instruction depends on previous register op
sb x1, 100(x0)
lbu x31, 100(x0)
addi x1, x0, 0x0FB
nop # Next instruction depends on previous register op
sb x1, 106(x0)
lbu x31, 106(x0)

4
bench/tests/op/lh.s
View File

@@ -2,15 +2,11 @@
.text
_start:
lui x1, 0xF
nop # Next instruction depends on previous register op
ori x1, x1, 0x1BC
nop # Next instruction depends on previous register op
sh x1, 100(x0)
lh x31, 100(x0)
lui x1, 0xF
nop # Next instruction depends on previous register op
ori x1, x1, 0x1BC
nop # Next instruction depends on previous register op
sh x1, 106(x0)
lh x31, 106(x0)

4
bench/tests/op/lhu.s
View File

@@ -2,15 +2,11 @@
.text
_start:
lui x1, 0xF
nop # Next instruction depends on previous register op
ori x1, x1, 0x1BC
nop # Next instruction depends on previous register op
sh x1, 100(x0)
lhu x31, 100(x0)
lui x1, 0xF
nop # Next instruction depends on previous register op
ori x1, x1, 0x1BC
nop # Next instruction depends on previous register op
sh x1, 106(x0)
lhu x31, 106(x0)

2
bench/tests/op/lw.s
View File

@@ -2,8 +2,6 @@
.text
_start:
lui x1, 0x12345
nop # Next instruction depends on previous register op
ori x1, x1, 0x1BC
nop # Next instruction depends on previous register op
sw x1, 100(x0)
lw x31, 100(x0)