|
|
c0b4311458
|
Ups frequency to 80Mhz : unstable behaviour
|
2025-11-16 16:45:00 +01:00 |
|
|
|
e55c3fde14
|
Reduces LUT needed by mul extension
|
2025-11-14 19:08:41 +01:00 |
|
|
|
d8596b2247
|
Rust character drawing
|
2025-11-14 09:57:42 +01:00 |
|
|
|
780da5b6d2
|
Merge branch 'main' into rv64im
|
2025-11-13 10:28:22 +01:00 |
|
|
|
7bb8b993ae
|
Implements (mostly untested) rv64i)
|
2025-11-12 18:02:14 +01:00 |
|
|
|
cfacd6a9fc
|
rv64im: passing tests
|
2025-11-12 11:50:09 +01:00 |
|
|
|
7a1221b16e
|
Merge branch 'rv64i' into rv64im
|
2025-11-11 19:17:46 +01:00 |
|
|
|
8cff4de02e
|
Adds extension M instructions: not tested
|
2025-11-11 13:10:19 +01:00 |
|
|
|
297562766c
|
Adds addiw instruction, all tests passing
|
2025-11-10 22:07:15 +01:00 |
|
|
|
9daa296892
|
Lays groundword for Rv64i extension
Some base files had to be modified to support 64-bit architecture
as well as the Makefile to load 64-bit words into memory
|
2025-11-10 16:38:40 +01:00 |
|
|
|
03e315903e
|
Implements sub: passing tests
|
2025-11-09 18:33:12 +01:00 |
|
|
|
036f432d76
|
Stage 9: Full implemntation + passing tests
|
2025-11-07 18:03:45 +01:00 |
|
|
|
a897778605
|
Modifies alu for branching instructions
|
2025-11-07 17:04:05 +01:00 |
|
|
|
2779471523
|
Stage 6: implementation, untested
|
2025-11-06 16:18:01 +01:00 |
|
|
|
5df85799ef
|
Stage 4: Implements auipc
|
2025-11-05 18:40:27 +01:00 |
|
