Interrupts are working again, new fontplate

This commit is contained in:
2026-03-15 17:26:11 +01:00
parent b1aac20b57
commit baeea20aa7
10 changed files with 62 additions and 62 deletions

View File

@@ -39,12 +39,6 @@ pub trait Draw {
///
/// Uses the embedded font plate to render glyphs into the framebuffer.
unsafe fn draw_char_bg(&mut self, x: u16, y: u16, c: char, color: Color, bg_color: Color) {
let c = if (c as u8 > b'~') || ((c as u8) < b' ') {
b'/' - b' '
} else {
c as u8 - b' '
};
// Get char position within font plate
let char_x = (c as usize % 32) * FONT_WIDTH;
let char_y = (c as usize / 32) * FONT_HEIGHT;
@@ -119,6 +113,6 @@ pub trait Draw {
pub const FONT_WIDTH: usize = 6;
pub const FONT_HEIGHT: usize = 13;
pub const FONTPLATE_WIDTH: usize = 32 * FONT_WIDTH;
pub const FONTPLATE_HEIGHT: usize = 3 * FONT_HEIGHT;
pub const FONTPLATE_HEIGHT: usize = 42 * FONT_HEIGHT;
pub const FONTPLATE_SIZE: usize = FONTPLATE_WIDTH * FONTPLATE_HEIGHT / 8;
pub static FONTPLATE: [u8; FONTPLATE_SIZE] = include_bitmap_image! {"assets/fontplate.png"};

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@@ -385,17 +385,6 @@ unsafe extern "C" fn _supervisor_mode_trap() {
csrr t0, sepc
sd t0, 248(sp)
csrr t0, sstatus
// Move SIE bit to SPIE. Restore_context, in the sret instruction, will do the inverse operation
// Isolate SIE bit (1)
andi t1, t0, 0x2
// li t1, 0x2
// Shift to bit 5 (SPIE)
slli t1, t1, 4
// Clear bit 1 and 5
li t2, ~0x22
and t0, t0, t2
// Add the SPIE bit
or t0, t0, t1
sd t0, 256(sp)
mv a0, sp

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@@ -115,7 +115,7 @@ pub static mut KBD_DRIVER: VirtioPciDriver = unsafe {
}
_ => {}
}
// println!("event: {:#?}", event);
println!("event: {:#?}", event);
}
} else {
// println!("key pressed, {:#?}", event);
@@ -171,12 +171,12 @@ pub extern "C" fn supervisor_mode_entry() {
info!("Hello World !");
// unsafe { Vga.draw_string(10, 10, "Hello World !", Color::WHITE, Color::BLACK) };
// SCHEDULER.lock().create_process(Box::new(test), "proc1");
// SCHEDULER.lock().create_process(Box::new(proc2), "proc2");
SCHEDULER.lock().create_process(Box::new(test), "proc1");
SCHEDULER.lock().create_process(Box::new(proc2), "proc2");
// SCHEDULER
// .lock()
// .create_process_from_file("/usr/bin/test_pic");
SCHEDULER
.lock()
.create_process_from_file("/usr/bin/test_pic");
enable_supervisor_interrupt();

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@@ -16,6 +16,7 @@ use shared::syscall::exit;
use crate::{
println,
riscv::SStatus,
scheduler::{ACTIVE_PID, SCHEDULER, Scheduler},
time::elapsed_time_since_startup,
tty::TTY0,
@@ -25,15 +26,6 @@ use crate::{
/// Size of the stack allocated to each process (in 64-bit words).
const STACK_SIZE: usize = 4096;
/// MSTATUS bit to enable supervisor mode interrupts.
const MSTATUS_SIE: u64 = 1 << 1;
/// MSTATUS bit to enable supervisor mode interrupts.
const MSTATUS_SPIE: u64 = 1 << 5;
/// MSTATUS bit to set previous privilege mode to supervisor.
const MSTATUS_SPP: u64 = 1 << 1;
/// Represents the state of a process in the system.
#[derive(Debug, PartialEq, Eq)]
pub enum ProcessState {
@@ -317,7 +309,7 @@ impl Scheduler {
process.ctx.mepc = process_launcher as *const _;
// Configure mstatus for supervisor mode with interrupts enabled
process.ctx.mstatus = MSTATUS_SPP | MSTATUS_SPIE;
process.ctx.mstatus = SStatus::SPIE;
// Initialize stack pointer at the top of the stack
process.ctx.sp = &raw const process.stack[STACK_SIZE - 1];

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@@ -22,8 +22,9 @@ impl MStatus {
pub const MPIE: usize = 1 << 7;
}
impl SStatus {
pub const SIE: usize = 1 << 1;
pub const SPIE: usize = 1 << 5;
pub const SPP: u64 = 1 << 8;
pub const SIE: u64 = 1 << 1;
pub const SPIE: u64 = 1 << 5;
}
/// Return the current machine interrupt enable state.
@@ -32,7 +33,7 @@ pub fn get_interrupt_state() -> bool {
}
/// Return whether supervisor interrupts are currently enabled.
pub fn get_supervisor_interrupt_state() -> bool {
(read_csr!(sstatus) & SStatus::SIE as u64) != 0
(read_csr!(sstatus) & SStatus::SIE) != 0
}
/// Enable machine-level interrupts.
pub fn enable_interrupt() {

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@@ -26,7 +26,7 @@ const CLINT_TIMER: *const u64 = 0x0200_bff8 as *const u64;
/// The hardware timer frequency (Hz).
const TIMER_FREQUENCY: u64 = 10_000_000; // 10 MHz
/// The frequency at which timer interrupts should occur (Hz).
const INTERRUPT_FREQUENCY: u64 = 200; // 20 Hz
const INTERRUPT_FREQUENCY: u64 = 100; // 100 Hz
/// Stores the instant when the kernel started.
static START_TIME: AtomicU64 = AtomicU64::new(0);