Files
fmn_processor/bench/tests/op/sb.s

29 lines
565 B
ArmAsm

# expected: 00000050, 000001AB
.text
_start:
auipc x12, 0x0
addi x1, x0, 0x5
# Write x1 in the next addi instruction, position 12+3 bytes
# Due to type I immediate, x31 must contain 0x050
sb x1, 19(x12)
nop
addi x31, x0, 0x0
# Create an instruction bytes per bytes
# addi x31, x0, 0x1AB -> 0x1AB00F93
addi x1, x0, 0x93
addi x2, x0, 0x0F
addi x3, x0, 0xB0
addi x4, x0, 0x1A
sb x1, 56(x12)
sb x2, 57(x12)
sb x3, 58(x12)
sb x4, 59(x12)
nop
# Instruction will be written here
nop