Files
fmn_processor/bench/tests/op/lhu.s

15 lines
226 B
ArmAsm

# expected: 0000F1BC, 0000F1BC
.text
_start:
li x2, 0x11000
lui x1, 0xF
ori x1, x1, 0x1BC
sh x1, 100(x2)
lhu x31, 100(x2)
lui x1, 0xF
ori x1, x1, 0x1BC
sh x1, 106(x2)
lhu x31, 106(x2)