Files
fmn_processor/bench/tests/op/srl.s
2025-11-06 18:52:31 +01:00

15 lines
243 B
ArmAsm

# expected: 000000FF, 00000001, 00000000
.text
_start:
addi x1, x0, 0x3FC
addi x2, x0, 2
srl x31, x1, x2
lui x1, 0xA0000
addi x2, x0, 31
srl x31, x1, x2
lui x1, 0x0A000
addi x2, x0, 31
srl x31, x1, x2