Gets rust running rv64iM

This commit is contained in:
2025-11-16 12:19:49 +01:00
parent 674c399ef6
commit 4955f9b952
5 changed files with 33 additions and 11 deletions

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@@ -4,6 +4,7 @@ FPGA_BOARD = zybo_z7_10
TOCLEAN = $(filter %log %.jou %.rpt %.mmi %.dcp %.csv\
%.wdb vivado% updatemem% usage_statistics_webtalk%,$(wildcard *))
TOCLEAN += $(wildcard _*) .Xil out RTL build download.bit $(MEM_DIR)
TOCLEAN += ./bench/programs_rust/target/riscv64i/release
# macro de verbosité
VERB := 0

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@@ -1,4 +1,4 @@
.section .text,"ax",@progbits
.section .text._start,"ax",@progbits
.equ STACK_SIZE, 1024
.globl _start

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@@ -1,16 +1,36 @@
OUTPUT_ARCH( "riscv" )
ENTRY (_start)
MEMORY
{
/* Ram */
ram (rawx) : ORIGIN = 0x00010000, LENGTH = 0x10000
}
SECTIONS
{
. = 0x10000;
.text : { *(.text) }
. = ORIGIN(ram);
.text : {
*(.text._start)
*(.text .text.*)
} >ram
. = ALIGN(8);
.data : { *(.data) }
.bss : { *(.bss) }
.rodata : {
*(.rodata .rodata.*)
} >ram
. = ALIGN(8);
.data : { *(.data .data.* ) } >ram
.bss : { *(.bss .bss.* ) } >ram
. = ALIGN(8);
PROVIDE(_memory_start = . );
PROVIDE(_memory_end = 0x20000);
PROVIDE(_memory_end = ORIGIN(ram) + LENGTH(ram));
PROVIDE(_stack_size = 1024); /* 1 KiB */
PROVIDE(_stack_start = _memory_end);
PROVIDE(_stack_end = _stack_start - _stack_size);

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@@ -2,13 +2,14 @@
target = "riscv64i.json"
[target.riscv64i]
linker = "riscv64-unknown-elf-ld"
# linker = "rust-lld"
#linker = "riscv64-unknown-elf-ld"
linker = "ld.lld"
rustflags = [
# "-C", "link-arg=-nostartfiles",
"-C", "link-arg=-T../link.ld",
"-C", "link-arg=../mem/crt.o",
"-C", "target-feature=+m",
]
[unstable]

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@@ -9,9 +9,9 @@
"os": "none",
"vendor": "unknown",
"env": "",
"features": "+i",
"linker-flavor": "ld.lld",
"linker": "riscv64-unknown-elf-ld",
"features": "+i,+m",
"linker": "ld.lld",
"linker-flavor": "ld",
"executables": true,
"panic-strategy": "abort",
"relocation-model": "static",