From 4955f9b952698321fa71e9716c57d88f8ef331a0 Mon Sep 17 00:00:00 2001
From: Albin Chaboissier <chalbin73@gmail.com>
Date: Sun, 16 Nov 2025 12:19:49 +0100
Subject: [PATCH] Gets rust running rv64iM

---
 Makefile                               |  1 +
 bench/crt.S                            |  2 +-
 bench/link.ld                          | 30 +++++++++++++++++++++-----
 bench/programs_rust/.cargo/config.toml |  5 +++--
 bench/programs_rust/riscv64i.json      |  6 +++---
 5 files changed, 33 insertions(+), 11 deletions(-)

diff --git a/Makefile b/Makefile
index 13ba347..759db95 100644
--- a/Makefile
+++ b/Makefile
@@ -4,6 +4,7 @@ FPGA_BOARD = zybo_z7_10
 TOCLEAN = $(filter %log %.jou %.rpt %.mmi %.dcp %.csv\
                    %.wdb vivado% updatemem% usage_statistics_webtalk%,$(wildcard *))
 TOCLEAN += $(wildcard _*) .Xil out RTL build download.bit $(MEM_DIR)
+TOCLEAN += ./bench/programs_rust/target/riscv64i/release
 
 # macro de verbosité
 VERB     := 0
diff --git a/bench/crt.S b/bench/crt.S
index 19d6221..9f948c2 100644
--- a/bench/crt.S
+++ b/bench/crt.S
@@ -1,4 +1,4 @@
-    .section .text,"ax",@progbits
+    .section .text._start,"ax",@progbits
     .equ   STACK_SIZE,   1024
     .globl _start
 
diff --git a/bench/link.ld b/bench/link.ld
index bbedd8f..bab7592 100644
--- a/bench/link.ld
+++ b/bench/link.ld
@@ -1,16 +1,36 @@
 OUTPUT_ARCH( "riscv" )
 
+
 ENTRY (_start)
+MEMORY
+{
+    /* Ram */
+    ram (rawx)  : ORIGIN = 0x00010000, LENGTH = 0x10000
+}
 SECTIONS
 {
-    . = 0x10000;
-    .text : { *(.text) }
+
+    . = ORIGIN(ram);
+    .text : { 
+        *(.text._start)
+        *(.text .text.*)
+    } >ram
+
     . = ALIGN(8);
-    .data : { *(.data) }
-    .bss : { *(.bss) }
+
+    .rodata : { 
+        *(.rodata .rodata.*)
+    } >ram
+
     . = ALIGN(8);
+
+    .data : { *(.data .data.* ) } >ram
+    .bss : { *(.bss .bss.* ) } >ram
+
+    . = ALIGN(8);
+
     PROVIDE(_memory_start = . );
-    PROVIDE(_memory_end = 0x20000);
+    PROVIDE(_memory_end = ORIGIN(ram) + LENGTH(ram));
     PROVIDE(_stack_size = 1024); /* 1 KiB */
     PROVIDE(_stack_start = _memory_end);
     PROVIDE(_stack_end = _stack_start - _stack_size);
diff --git a/bench/programs_rust/.cargo/config.toml b/bench/programs_rust/.cargo/config.toml
index faccd54..cf30495 100644
--- a/bench/programs_rust/.cargo/config.toml
+++ b/bench/programs_rust/.cargo/config.toml
@@ -2,13 +2,14 @@
 target = "riscv64i.json"
 
 [target.riscv64i]
-linker = "riscv64-unknown-elf-ld"
-# linker = "rust-lld"
+#linker = "riscv64-unknown-elf-ld"
+linker = "ld.lld"
 
 rustflags = [
     # "-C", "link-arg=-nostartfiles",
     "-C", "link-arg=-T../link.ld",
     "-C", "link-arg=../mem/crt.o",
+    "-C", "target-feature=+m",
 ]
 
 [unstable]
diff --git a/bench/programs_rust/riscv64i.json b/bench/programs_rust/riscv64i.json
index b3831f4..432dcf6 100644
--- a/bench/programs_rust/riscv64i.json
+++ b/bench/programs_rust/riscv64i.json
@@ -9,9 +9,9 @@
     "os": "none",
     "vendor": "unknown",
     "env": "",
-    "features": "+i",
-    "linker-flavor": "ld.lld",
-    "linker": "riscv64-unknown-elf-ld",
+    "features": "+i,+m",
+    "linker": "ld.lld",
+    "linker-flavor": "ld",
     "executables": true,
     "panic-strategy": "abort",
     "relocation-model": "static",