49 lines
1.8 KiB
Markdown
49 lines
1.8 KiB
Markdown
# Example
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This directory shows how to flash a system verilog program (A full-adder) on a Zybo `xc7z010clg400-1` card.
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## Build
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Firstly, the system verilog file needs to be converted to verilog in order to use it with yosys :
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```bash
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podman run --mount=type=bind,source=.,target=/root/code fmn_alpine sv2v adder.sv -w adder.v
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```
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The mount parameter is used to provide to podman the current directory.
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Then, yosys can achieve the RTL synthesis of the program :
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```bash
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podman run --mount=type=bind,source=.,target=/root/code fmn_alpine yosys adder.v -p "synth_xilinx; write_json synthesis.json"
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```
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Nextpnr can now place and route each components using the xdc constraints file :
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```bash
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podman run --mount=type=bind,source=.,target=/root/code fmn_alpine nextpnr-himbaechel --json synthesis.json -o xdc=adder.xdc -o fasm=out.fasm --device xc7z010clg400-1
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```
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Now the fasm file can be converted in a frames file and then in a bitstream :
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```bash
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podman run --mount=type=bind,source=.,target=/root/code fmn_alpine fasm2frames --part xc7z010clg400-1 --db-root /usr/share/xray/database/zynq7 out.fasm out.frames
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podman run --mount=type=bind,source=.,target=/root/code fmn_alpine xc7frames2bit -frm_file out.frames -part_file /usr/share/xray/database/zynq7/xc7z010clg400-1/part.yaml --output_file out.bin
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```
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## Flashing the FPGA
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Finally, we can flash the bitstream on the card with `openFPGALoader`.
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Podman requires a device argument to allow openFPGALoader to access the usb interface. You can find this path with `lsusb` :
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```txt
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Bus 003 Device 005: ID 0403:6010 Future Technology Devices International, Ltd FT2232C/D/H Dual UART/FIFO IC
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```
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Here the usb device path is `/dev/bus/usb/003/005`
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```bash
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podman run --device=/dev/bus/usb/003/005 --mount=type=bind,source=.,target=/root/code fmn_alpine openFPGALoader -b zybo_z7_10 out.bin
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```
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