Makes scheduler works at the end of the interruption
This commit is contained in:
105
src/scheduler.rs
105
src/scheduler.rs
@@ -1,16 +1,10 @@
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use core::{
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arch::{naked_asm, riscv64::wfi},
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array,
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cell::LazyCell,
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time::Duration,
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};
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use core::{arch::riscv64::wfi, array, cell::LazyCell, time::Duration};
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use alloc::string::String;
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use log::info;
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use crate::{
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process::{create_processus, ExecutionContext, Process, ProcessState},
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riscv::enable_supervisor_interrupt,
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time,
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};
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@@ -31,7 +25,7 @@ pub static mut PROCESS_TABLE: LazyCell<[Process; PROCESSUS_COUNT]> = LazyCell::n
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a: [0; _],
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t: [0; _],
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s: [0; _],
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mepc: 0,
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mepc: core::ptr::null(),
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mstatus: 0,
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},
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entry_point: None,
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@@ -41,7 +35,7 @@ pub static mut PROCESS_TABLE: LazyCell<[Process; PROCESSUS_COUNT]> = LazyCell::n
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pub extern "C" fn idle() {
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loop {
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enable_supervisor_interrupt();
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// enable_supervisor_interrupt();
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unsafe {
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wfi();
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}
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@@ -62,13 +56,14 @@ pub fn scheduler_init() {
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}
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}
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pub fn scheduler(interrupt_state: ExecutionContext) -> usize {
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pub fn scheduler(interrupt_state: ExecutionContext) -> *const ExecutionContext {
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// info!("scheduler");
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unsafe {
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let prev_pid = ACTIVE_PID;
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PROCESS_TABLE[prev_pid].ctx = interrupt_state;
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if PROCESS_TABLE[ACTIVE_PID].state == ProcessState::Active {
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PROCESS_TABLE[ACTIVE_PID].state = ProcessState::Activable;
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if PROCESS_TABLE[prev_pid].state == ProcessState::Active {
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PROCESS_TABLE[prev_pid].state = ProcessState::Activable;
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}
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loop {
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@@ -84,90 +79,6 @@ pub fn scheduler(interrupt_state: ExecutionContext) -> usize {
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}
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PROCESS_TABLE[ACTIVE_PID].state = ProcessState::Active;
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PROCESS_TABLE[prev_pid].ctx = interrupt_state;
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// PROCESS_TABLE[prev_pid].ctx.t = interrupt_state.t;
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// PROCESS_TABLE[prev_pid].ctx.ra = interrupt_state.ra;
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context_switch(
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PROCESS_TABLE[ACTIVE_PID].entry_point.unwrap(),
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&raw mut PROCESS_TABLE[prev_pid].ctx,
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&raw mut PROCESS_TABLE[ACTIVE_PID].ctx,
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);
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prev_pid
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&raw const PROCESS_TABLE[ACTIVE_PID].ctx
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}
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}
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#[unsafe(naked)]
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pub extern "C" fn context_switch(
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code: extern "C" fn(),
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current: *mut ExecutionContext,
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next: *mut ExecutionContext,
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) {
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naked_asm!(
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"
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// sd ra, 0(a1)
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// sd sp, 8(a1)
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// sd gp, 16(a1)
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// sd tp, 24(a1)
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// sd s0, 152(a1)
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// sd s1, 160(a1)
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// sd s2, 168(a1)
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// sd s3, 176(a1)
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// sd s4, 184(a1)
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// sd s5, 192(a1)
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// sd s6, 200(a1)
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// sd s7, 208(a1)
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// sd s8, 216(a1)
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// sd s9, 224(a1)
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// sd s10, 232(a1)
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// sd s11, 240(a1)
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// csrr t0, sepc
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// sd t0, 248(a1)
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// csrr t0, sstatus
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// sd t0, 256(a1)
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# Load next execution context
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ld t0, 248(a2)
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csrw sepc, t0
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ld t0, 256(a2)
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csrw sstatus, t0
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ld ra, 0(a2)
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ld sp, 8(a2)
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ld gp, 16(a2)
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ld tp, 24(a2)
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ld a0, 32(a2)
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ld a1, 40(a2)
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// Skip a2 since it used as a pointer
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ld a3, 56(a2)
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ld a4, 64(a2)
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ld a5, 72(a2)
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ld a6, 80(a2)
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ld a7, 88(a2)
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ld t0, 96(a2)
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ld t1, 104(a2)
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ld t2, 112(a2)
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ld t3, 120(a2)
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ld t4, 128(a2)
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ld t5, 136(a2)
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ld t6, 144(a2)
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ld s0, 152(a2)
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ld s1, 160(a2)
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ld s2, 168(a2)
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ld s3, 176(a2)
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ld s4, 184(a2)
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ld s5, 192(a2)
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ld s6, 200(a2)
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ld s7, 208(a2)
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ld s8, 216(a2)
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ld s9, 224(a2)
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ld s10, 232(a2)
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ld s11, 240(a2)
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// Restore a2 at the end
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ld a2, 48(a2)
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addi sp, sp, 264
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sret"
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);
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}
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