First commit

src/riscv.rs

@@ -0,0 +1,22 @@
+use core::arch::asm;
+
+const MSTATUS_MIE: usize = 0x8;
+
+pub fn get_interrupt_state() -> bool {
+    let res: u64;
+    unsafe { asm!("csrr {}, mstatus", out(reg) res) };
+    (res & MSTATUS_MIE as u64) != 0
+}
+pub fn enable_interrupt() {
+    unsafe { asm!("csrs mstatus, {}", in(reg) MSTATUS_MIE) };
+}
+pub fn disable_interrupt() {
+    unsafe { asm!("csrc mstatus, {}", in(reg) MSTATUS_MIE) };
+}
+pub fn restore_interrupt(previous_state: bool) {
+    if previous_state {
+        enable_interrupt();
+    } else {
+        disable_interrupt();
+    }
+}