36 lines
922 B
Tcl
36 lines
922 B
Tcl
# Input arguments
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set DEVICE [lindex $argv 0]
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set TOP [lindex $argv 1]
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set REP [lindex $argv 2]
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#lecture de tous les sv générés
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set files [glob RTL/${REP}.${TOP}/*.sv]
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read_verilog -sv $files
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read_verilog -sv src/main/resources/vsrc/clk_wiz.v
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read_verilog -sv src/main/resources/vsrc/dpram.v
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read_xdc common/clock.xdc
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# Detect XPM memory
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auto_detect_xpm
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# Start synthesis
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synth_design -top ${TOP} -part ${DEVICE} -mode "out_of_context"
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report_utilization -file ${TOP}_utilization.rpt
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report_timing -file ${TOP}_timing.rpt
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report_clocks
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get_ports *
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set filename "${TOP}_summary.rpt"
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set fileId [open $filename "w"]
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if { [get_clocks] != "" } {
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puts -nonewline $fileId "Clock | "
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puts $fileId [get_property -min PERIOD [get_clocks]];
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}
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if { [get_timing_paths] != "" } {
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puts -nonewline $fileId "Slack | "
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puts $fileId [get_property SLACK [get_timing_paths]];
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}
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close $fileId
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exit
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