# expected: FFFFF1BC, FFFFF1BC
    .text
_start:
    lui x1, 0xF
    nop # Next instruction depends on previous register op
    ori x1, x1, 0x1BC
    nop # Next instruction depends on previous register op
    sh x1, 100(x0)
    lh x31, 100(x0)

    lui x1, 0xF
    nop # Next instruction depends on previous register op
    ori x1, x1, 0x1BC
    nop # Next instruction depends on previous register op
    sh x1, 106(x0)
    lh x31, 106(x0)