Rv64i : passing test

2025-11-13 09:49:18 +01:00
parent 7bb8b993ae
commit 030149cbea
16 changed files with 166 additions and 6 deletions
--- a/bench/tests/op/sllw.s
+++ b/bench/tests/op/sllw.s
@@ -0,0 +1,16 @@
+# expected: 0000000000000000, FFFFFFFF80000000, 0000000000000000
+    .text
+_start:
+    # Shift out of 32bits
+    li x1, 0x0000000080000000
+    li x2, 1
+    sllw x31, x1, x2
+
+    # Test sign extension
+    li x1, 0x0000000040000000
+    li x2, 1
+    sllw x31, x1, x2
+
+    li x1, 1
+    li x2, 33
+    sllw x31, x1, x2