Rv64i : passing test

2025-11-13 09:49:18 +01:00
parent 7bb8b993ae
commit 030149cbea
16 changed files with 166 additions and 6 deletions
--- a/bench/tests/op/addw.s
+++ b/bench/tests/op/addw.s
@@ -0,0 +1,19 @@
+# expected: 0000000000000000, FFFFFFFFFFFFFFFF, 0000000000000010, 0000000000000000
+    .text
+_start:
+    # 0 addition
+    li x1, 0
+    addw x31, x0, x1
+
+    # all bits addition + sign extension to 32 bits then 64 bits
+    li x1, 0x00000000FFFFFFFF
+    addw x31, x0, x1
+
+    # simple addition
+    li x1, 8
+    li x2, 8
+    addw x31, x1, x2
+
+    # 32bits trim
+    li x1, 0xFFFFFFFF00000000
+    addw x31, x0, x1