fixed import on non-debug build

simu/src/cpu.rs

@@ -9,6 +9,9 @@ use std::{
     sync::atomic::AtomicU32,
     time::{self, Instant},
 };
+
+#[cfg(not(feature = "debug"))]
+use std::process::exit;
 pub(crate) struct SharedState {
     pub(crate) keyboard: [AtomicU32; 4],
     pub(crate) screen_buf: [AtomicU32; 480 * 640],
@@ -119,7 +122,7 @@ impl Cond {
             Cond::Ifuge => a >= b,
             Cond::Ifugt => a > b,
             Cond::Ifule => a <= b,
-            _ => return None
+            _ => return None,
         })
     }
 }
@@ -338,7 +341,7 @@ pub struct Computer {
     #[cfg(feature = "debug")]
     pub(crate) error: bool,
     #[cfg(feature = "debug")]
-    pub(crate) book: (HashMap<u32, String>,HashMap<String,u32>),
+    pub(crate) book: (HashMap<u32, String>, HashMap<String, u32>),
 }
 
 impl Index<Reg> for Computer {
@@ -367,7 +370,7 @@ impl Computer {
             #[cfg(feature = "debug")]
             error: false,
             #[cfg(feature = "debug")]
-            book: (HashMap::new(),HashMap::new()),
+            book: (HashMap::new(), HashMap::new()),
         };
         let mut buf = String::new();
         std::fs::File::open(filename)
@@ -393,7 +396,6 @@ impl Computer {
         new
     }
 
-    
     #[inline(always)]
     pub fn step(&mut self, s: usize) {
         match self.interupts {
@@ -587,11 +589,12 @@ impl Computer {
                         Instruction::Skip(d, cond, reg, op2) => {
                             self.pc += 1;
                             match cond.eval(self[reg], self.resolve(op2)) {
-                                Some(false) => {/*Nothing*/}
+                                Some(false) => { /*Nothing*/ }
-                                Some(true) => {self.pc += d as usize}
+                                Some(true) => self.pc += d as usize,
                                 None => {
                                     cold_path();
-                                    self.serve_interupt(InteruptKind::IllegalOpcode, [next_opcode])}
+                                    self.serve_interupt(InteruptKind::IllegalOpcode, [next_opcode])
+                                }
                             }
                         }
                         Instruction::Jump(addr) => {
@@ -748,7 +751,7 @@ impl Computer {
         }
     }
     #[cfg(feature = "debug")]
-    pub fn debug_step(&mut self,s: usize){
+    pub fn debug_step(&mut self, s: usize) {
         self.step(s);
     }
     #[inline(always)]

simu/src/main.rs

@@ -20,7 +20,7 @@ use winit::event_loop::EventLoop;
 use winit::platform::scancode::PhysicalKeyExtScancode;
 use winit::window::Window;
 
-use crate::cpu::{Computer, MMIOInterupt, instr_to_text};
+use crate::cpu::{Computer, MMIOInterupt};
 mod wait;
 use wait::WaitOnAtomic;
 mod cpu;
@@ -466,7 +466,7 @@ fn debug_loop(com: &mut Computer) {
         fn complete(&mut self, line: &str, pos: usize) -> Vec<clap_repl::reedline::Suggestion> {
             let trimmed = line.trim_start();
             let line_parts = trimmed.splitn(2, ' ').collect::<Vec<_>>();
-    
+
             if line_parts.len() <= 1 {
                 self.0.complete(line, pos)
             } else {
@@ -492,7 +492,9 @@ fn debug_loop(com: &mut Computer) {
     }
 }
 
+#[cfg(feature = "debug")]
 fn debug_context(com: &Computer) {
+    use crate::cpu::instr_to_text;
     println!("Interupt state: {:?}", com.interupts);
     for i in 0..8 {
         println!(
@@ -506,14 +508,13 @@ fn debug_context(com: &Computer) {
     println!("RAM at SP | Ram at PC:");
 
     let mut pc_lines = Vec::new();
-    
+
     for i in 0..16 {
         match com.book.0.get(&((com.pc + i) as u32 * 4)) {
             Some(label) => pc_lines.push(format!("        {label}:")),
             None => {}
         };
         pc_lines.push(format!(
-            
             "{:08x}  {}",
             com.ram[com.pc + i],
             instr_to_text(com.ram[com.pc + i], (com.pc + i) as u32 * 4, &com.book.0)