mwa/bisare_sim_rs
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fixed import on non-debug build

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This commit is contained in:
Mwa
2026-03-24 15:36:52 +01:00
parent ced0e13f6b
commit 8d7cb5e6f3
2 changed files with 16 additions and 12 deletions
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19
simu/src/cpu.rs
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@@ -9,6 +9,9 @@ use std::{
sync::atomic::AtomicU32, sync::atomic::AtomicU32,
time::{self, Instant}, time::{self, Instant},
}; };
#[cfg(not(feature = "debug"))]
use std::process::exit;
pub(crate) struct SharedState { pub(crate) struct SharedState {
pub(crate) keyboard: [AtomicU32; 4], pub(crate) keyboard: [AtomicU32; 4],
pub(crate) screen_buf: [AtomicU32; 480 * 640], pub(crate) screen_buf: [AtomicU32; 480 * 640],
@@ -119,7 +122,7 @@ impl Cond {
Cond::Ifuge => a >= b, Cond::Ifuge => a >= b,
Cond::Ifugt => a > b, Cond::Ifugt => a > b,
Cond::Ifule => a <= b, Cond::Ifule => a <= b,
_ => return None _ => return None,
}) })
} }
} }
@@ -338,7 +341,7 @@ pub struct Computer {
#[cfg(feature = "debug")] #[cfg(feature = "debug")]
pub(crate) error: bool, pub(crate) error: bool,
#[cfg(feature = "debug")] #[cfg(feature = "debug")]
pub(crate) book: (HashMap<u32, String>,HashMap<String,u32>), pub(crate) book: (HashMap<u32, String>, HashMap<String, u32>),
} }
impl Index<Reg> for Computer { impl Index<Reg> for Computer {
@@ -367,7 +370,7 @@ impl Computer {
#[cfg(feature = "debug")] #[cfg(feature = "debug")]
error: false, error: false,
#[cfg(feature = "debug")] #[cfg(feature = "debug")]
book: (HashMap::new(),HashMap::new()), book: (HashMap::new(), HashMap::new()),
}; };
let mut buf = String::new(); let mut buf = String::new();
std::fs::File::open(filename) std::fs::File::open(filename)
@@ -393,7 +396,6 @@ impl Computer {
new new
} }
#[inline(always)] #[inline(always)]
pub fn step(&mut self, s: usize) { pub fn step(&mut self, s: usize) {
match self.interupts { match self.interupts {
@@ -587,11 +589,12 @@ impl Computer {
Instruction::Skip(d, cond, reg, op2) => { Instruction::Skip(d, cond, reg, op2) => {
self.pc += 1; self.pc += 1;
match cond.eval(self[reg], self.resolve(op2)) { match cond.eval(self[reg], self.resolve(op2)) {
Some(false) => {/*Nothing*/} Some(false) => { /*Nothing*/ }
Some(true) => {self.pc += d as usize} Some(true) => self.pc += d as usize,
None => { None => {
cold_path(); cold_path();
self.serve_interupt(InteruptKind::IllegalOpcode, [next_opcode])} self.serve_interupt(InteruptKind::IllegalOpcode, [next_opcode])
}
} }
} }
Instruction::Jump(addr) => { Instruction::Jump(addr) => {
@@ -748,7 +751,7 @@ impl Computer {
} }
} }
#[cfg(feature = "debug")] #[cfg(feature = "debug")]
pub fn debug_step(&mut self,s: usize){ pub fn debug_step(&mut self, s: usize) {
self.step(s); self.step(s);
} }
#[inline(always)] #[inline(always)]

5
simu/src/main.rs
View File

@@ -20,7 +20,7 @@ use winit::event_loop::EventLoop;
use winit::platform::scancode::PhysicalKeyExtScancode; use winit::platform::scancode::PhysicalKeyExtScancode;
use winit::window::Window; use winit::window::Window;
use crate::cpu::{Computer, MMIOInterupt, instr_to_text}; use crate::cpu::{Computer, MMIOInterupt};
mod wait; mod wait;
use wait::WaitOnAtomic; use wait::WaitOnAtomic;
mod cpu; mod cpu;
@@ -492,7 +492,9 @@ fn debug_loop(com: &mut Computer) {
} }
} }
#[cfg(feature = "debug")]
fn debug_context(com: &Computer) { fn debug_context(com: &Computer) {
use crate::cpu::instr_to_text;
println!("Interupt state: {:?}", com.interupts); println!("Interupt state: {:?}", com.interupts);
for i in 0..8 { for i in 0..8 {
println!( println!(
@@ -513,7 +515,6 @@ fn debug_context(com: &Computer) {
None => {} None => {}
}; };
pc_lines.push(format!( pc_lines.push(format!(
"{:08x} {}", "{:08x} {}",
com.ram[com.pc + i], com.ram[com.pc + i],
instr_to_text(com.ram[com.pc + i], (com.pc + i) as u32 * 4, &com.book.0) instr_to_text(com.ram[com.pc + i], (com.pc + i) as u32 * 4, &com.book.0)