mwa/bisare_sim_rs
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

mul/div instruction and nightly toolchain

Browse Source
This commit is contained in:
Mwa
2026-03-09 18:05:07 +01:00
parent 034620591b
commit 149a0d6144
3 changed files with 48 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
rust-toolchain.toml Normal file
View File

@@ -0,0 +1,2 @@
[toolchain]
channel = "nightly"

44
src/cpu.rs
View File

@@ -75,6 +75,12 @@ enum Instruction {
Lsl(Reg, Reg, Op2),
Lsr(Reg, Reg, Op2),
Asr(Reg, Reg, Op2),
Smull(Reg, Reg, Op2),
Smulh(Reg, Reg, Op2),
Umull(Reg, Reg, Op2),
Umulh(Reg, Reg, Op2),
Div(Reg, Reg, Op2),
Mod(Reg, Reg, Op2),
Store(Reg, Op2, Reg),
Load(Reg, Reg, Op2),
Push(Op2),
@@ -129,6 +135,12 @@ impl From<u32> for Instruction {
(1, 0b0110) => Self::Lsl(rd, rx, op2),
(1, 0b0111) => Self::Lsr(rd, rx, op2),
(1, 0b1000) => Self::Asr(rd, rx, op2),
(1, 0b1001) => Self::Smull(rd, rx, op2),
(1, 0b1010) => Self::Smulh(rd, rx, op2),
(1, 0b1011) => Self::Umull(rd, rx, op2),
(1, 0b1100) => Self::Umulh(rd, rx, op2),
(1, 0b1101) => Self::Div(rd, rx, op2),
(1, 0b1110) => Self::Mod(rd, rx, op2),
(2, 0b0000) => Self::Store(rx, op2, rd),
(2, 0b0001) => Self::Load(rd, rx, op2),
(2, 0b0010) => Self::Push(op2),
@@ -219,6 +231,38 @@ impl<'a, 'b> Computer<'a, 'b> {
self.rg_wr(reg, (self.rg_r(reg1) as i32 >> self.resolve(op2)) as u32);
self.pc += 1;
}
Instruction::Umull(reg, reg1, op2) => {
self.rg_wr(reg, self.rg_r(reg1).wrapping_mul(self.resolve(op2)));
self.pc += 1;
}
Instruction::Smull(reg, reg1, op2) => {
self.rg_wr(
reg,
(self.rg_r(reg1) as i32).wrapping_mul(self.resolve(op2) as i32) as u32,
);
self.pc += 1;
}
Instruction::Umulh(reg, reg1, op2) => {
self.rg_wr(reg, self.rg_r(reg1).widening_mul(self.resolve(op2)).1);
self.pc += 1;
}
Instruction::Smulh(reg, reg1, op2) => {
self.rg_wr(
reg,
(self.rg_r(reg1) as i32)
.widening_mul(self.resolve(op2) as i32)
.1 as u32,
);
self.pc += 1;
}
Instruction::Div(reg, reg1, op2) => {
self.rg_wr(reg, self.rg_r(reg1) / self.resolve(op2));
self.pc += 1
}
Instruction::Mod(reg, reg1, op2) => {
self.rg_wr(reg, self.rg_r(reg1) % self.resolve(op2));
self.pc += 1
}
Instruction::Store(reg, op2, reg1) => {
let addr = (self.rg_r(reg) + self.resolve(op2)) as usize;
if !addr.is_multiple_of(4) {

2
src/main.rs
View File

@@ -1,4 +1,4 @@
#![feature(likely_unlikely)]
#![feature(likely_unlikely, widening_mul)]
#![deny(clippy::all)]
use std::env::args;