From 128a53bd3be2907a6081d4c6fdf753c1b360319d Mon Sep 17 00:00:00 2001
From: Mwa <mwa@mwaaa.fr>
Date: Fri, 27 Mar 2026 22:40:28 +0100
Subject: [PATCH] improved debug

---
 simu/src/main.rs | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/simu/src/main.rs b/simu/src/main.rs
index b927e93..21f351d 100644
--- a/simu/src/main.rs
+++ b/simu/src/main.rs
@@ -399,14 +399,14 @@ fn debug_loop(com: &mut Computer) {
         Commands::Run { desigantor } => match desigantor {
             Some(s) => match parse_int::parse::<usize>(s.as_str()) {
                 Ok(addr) => {
-                    while com.pc != (addr / 4) {
+                    while com.pc != (addr / 4) && !com.error {
                         com.debug_step(1);
                     }
                     debug_context(com);
                 }
                 Err(_) => match com.book.1.get(s.as_str()).cloned() {
                     Some(addr) => {
-                        while com.pc != (addr as usize / 4) {
+                        while com.pc != (addr as usize / 4) && !com.error {
                             com.debug_step(1);
                         }
                         debug_context(com);
@@ -425,9 +425,9 @@ fn debug_loop(com: &mut Computer) {
         },
         Commands::Up => {
             let curr_sp = com.sp;
-            while (com.sp < curr_sp)
-                || ((com.ram[com.pc] != (0b10001000 << 24))
-                    && (com.ram[com.pc] != (0b10101000 << 24)))
+            while (com.sp < curr_sp
+                || (com.ram[com.pc] != (0b10001000 << 24) && com.ram[com.pc] != (0b10101000 << 24)))
+                && !com.error
             {
                 com.debug_step(1);
             }